Keynote Speakers

Abstract
In the last decade, there have been major changes in the families of ferroelectric materials available for integration with CMOS electronics. This talk will discuss the possibility of exploiting the 3rd dimension in microelectronics for functions beyond interconnect optimization, enabling 3D non-von Neumann computer architectures exploiting ferroelectrics for local memory, logic in memory, digital/analog computation, and neuromorphic/reconfigurable functionality. This approach circumvents the end of Moore’s law in 2D scaling, while simultaneously overcoming the “von Neumann bottleneck” in moving instructions and data between separate logic and memory circuits. The talk will cover circuit and architectural features leveraging the non-volatile properties of ferro-electric FETs for hardware obfuscation, accelerator designs and in-memory compute structures.

Abstract
Four major trends – electrification, autonomous driving, connectivity, and centralized compute – are transforming automobile design and the semiconductors that enable them. As a result the automotive semiconductor market is expected to grow by more than 10% annually from $56 billion in 2022 to more than $140 billion in 2030. We will survey the industry and highlight the areas ripe for strong growth resulting from these trends. The second part of the talk will focus in on automotive sensors, critical to autonomous driving, and the technologies that are critical to this application.

Abstract
AI-designed chips are a reality. Samsung confirmed this a year ago with world’s first use of AI to design a mobile processor chip. Since then, AI for design has been adopted across the industry at a phenomenal pace, accelerating silicon innovations to market in automotive, high-performance computing, consumer electronics, and other applications. Will this pace of innovation continue and ultimately lead to self-designed silicon? In this session, we will be looking at real-world examples as we travel through the past, present and future for AI in chip design.

Abstract
With the complexity of IC grows exponentially, any failure becomes more and more expensive to fix down the IC realization pipeline. FV Functional verification (FV) as the first step to ensure the quality of IC design, is becoming a bottleneck of productivity. FV is computation- and data-intensive by its nature, which makes it a perfect playground of machine learning (ML) applications. In this presentation we will give comprehensive overview and up-to-date survey of FV problems that are being and can be addressed by ML. Among the various ML techniques, several emerging ones e.g. transformers and graph neural networks are especially powerful in solving many FV problems. The presentation will then shed light on critical challenges for ML to be widely adopted and applied in production environment for FV and EDA in general, discuss how we should get ready for the next generation FV empowered by ML.

Abstract
Various services using AI are becoming mainstream, and as the AI model size increases, the service range is also expanding. Accordingly, it requires more computing performance and more memory capacity. Technically, as you can see in the Go match between AlphaGo and Lee Sedol, the energy efficiency of AI computer system is fairly poor comparing with that of human brain. As a countermeasure against it, in this talk, Processing in Memory will be presented as one of the solutions. PIM architecture basically enables higher performance and lower energy consumption when performing memory intensive workloads. The current trending transformer based generative deep learning model, such as GPT2/3 shows memory intensive characteristics. The data analytics pipeline that pre-process and supplies data to the AI model also has a memory intensive feature. So, It is expected that PIM technology can be applied to the overall AI service computing system. In this talk, we’d like to introduce not only SK hynix’s 1st PIM product, GDDR6-AiM, but also CXL memory card based PIM solution and storage level PIM solution. And finally, the concept of `data hierarchy’ that applies PIM to all memory layers will be introduced as well.

Abstract
As the semiconductor industry enters a new era of technological innovations and advancements, companies are looking for ways to improve performance and accelerate productivity. With generational technology drivers like, 5G, AI and autonomous driving and shortened time to market demands, traditional disciplines and methodologies of chip design require a fundamental transformation. In this presentation we will review how customers are applying Machine Learning based engines to automate the design flow and deploying state-of-the-art cloud enabled Data Analytics platforms to address these demands and looking at the future of AI in EDA.